/*
 * eWX^̃ItZbg
 */
#define UART_RHR   0x00   /* H  LCR bit7=0 Read  */
#define UART_THR   0x00   /* H  LCR bit7=0 Write */
#define UART_DLL   0x00   /* H  LCR bit7=1       */
#define UART_IER   0x04   /* H  LCR bit7=0       */
#define UART_DLH   0x04   /* H  LCR bit7=1       */
#define UART_IER   0x04   /* H  WRITE  */
#define UART_IIR   0x08   /* H  Read  */
#define UART_LCR   0x0C   /* H  */
#define UART_MCR   0x10   /* H  */
#define UART_LSR   0x14   /* H  Read */
#define UART_SCR   0x1c   /* H  Scratch Pad */
#define UART_GCTL  0x24	  /* H Global Control Register */

#define ISR_TX            0x02       /* M荞ݔ */
#define IER_TX            0x02       /* M荞݋ */
#define ISR_RX            0x01       /* M荞ݔ */
#define IER_RX            0x01       /* M荞݋ */

#define LCR_DL_MODE       0x80       /* Divisor Enable */
#define LCR_VAL           0x03       /* 8bit,1stop,Noparity,No break */
#define FCR_FIFO_DISABLE  0x00

#define LSR_RX_DATA_READY 0x01
#define LSR_TX_EMPTY      0x20

#define MCR_INT_ENABLE    0x08

#define GCTL_UCEN		  0x01
