
imm-test.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 imm-test.c
00000000 l    d  .text	00000000 
00000000 l    d  .data	00000000 
00000000 l    d  .bss	00000000 
00000000 l    d  .comment	00000000 
00000000 g     F .text	00000010 falsep
00000010 g     F .text	00000010 ntc_falsep
00000020 g     F .text	00000010 nullp
00000030 g     F .text	00000010 ntc_nullp
00000040 g     F .text	00000010 consp
00000050 g     F .text	00000020 ntc_consp
00000070 g     F .text	0000002c memq
0000009c g     F .text	0000005c ntc_memq
000000f8 g     F .text	00000024 and
0000011c g     F .text	0000005c ntc_and
00000004       O *COM*	00000020 scm_ntc_true


Disassembly of section .text:

00000000 <falsep>:
   0:	e3500006 	cmp	r0, #6	; 0x6
   4:	13a00000 	movne	r0, #0	; 0x0
   8:	03a00001 	moveq	r0, #1	; 0x1
   c:	e12fff1e 	bx	lr

00000010 <ntc_falsep>:
  10:	e3500000 	cmp	r0, #0	; 0x0
  14:	13a00000 	movne	r0, #0	; 0x0
  18:	03a00001 	moveq	r0, #1	; 0x1
  1c:	e12fff1e 	bx	lr

00000020 <nullp>:
  20:	e3500026 	cmp	r0, #38	; 0x26
  24:	13a00000 	movne	r0, #0	; 0x0
  28:	03a00001 	moveq	r0, #1	; 0x1
  2c:	e12fff1e 	bx	lr

00000030 <ntc_nullp>:
  30:	e3500002 	cmp	r0, #2	; 0x2
  34:	13a00000 	movne	r0, #0	; 0x0
  38:	03a00001 	moveq	r0, #1	; 0x1
  3c:	e12fff1e 	bx	lr

00000040 <consp>:
  40:	e3100006 	tst	r0, #6	; 0x6
  44:	13a00000 	movne	r0, #0	; 0x0
  48:	03a00001 	moveq	r0, #1	; 0x1
  4c:	e12fff1e 	bx	lr

00000050 <ntc_consp>:
  50:	e3100006 	tst	r0, #6	; 0x6
  54:	e1a03000 	mov	r3, r0
  58:	13a00000 	movne	r0, #0	; 0x0
  5c:	03a00001 	moveq	r0, #1	; 0x1
  60:	e3530000 	cmp	r3, #0	; 0x0
  64:	03a00000 	moveq	r0, #0	; 0x0
  68:	12000001 	andne	r0, r0, #1	; 0x1
  6c:	e12fff1e 	bx	lr

00000070 <memq>:
  70:	e3110006 	tst	r1, #6	; 0x6
  74:	1a000023 	bne	94 <memq+0x24>
  78:	e5913000 	ldr	r3, [r1]
  7c:	e1530000 	cmp	r3, r0
  80:	01a00001 	moveq	r0, r1
  84:	012fff1e 	bxeq	lr
  88:	e5911004 	ldr	r1, [r1, #4]
  8c:	e3110006 	tst	r1, #6	; 0x6
  90:	0a00001c 	beq	78 <memq+0x8>
  94:	e3a00006 	mov	r0, #6	; 0x6
  98:	e12fff1e 	bx	lr

0000009c <ntc_memq>:
  9c:	e3110006 	tst	r1, #6	; 0x6
  a0:	13a03000 	movne	r3, #0	; 0x0
  a4:	03a03001 	moveq	r3, #1	; 0x1
  a8:	e3510000 	cmp	r1, #0	; 0x0
  ac:	03a03000 	moveq	r3, #0	; 0x0
  b0:	12033001 	andne	r3, r3, #1	; 0x1
  b4:	e3530000 	cmp	r3, #0	; 0x0
  b8:	0a00003a 	beq	f0 <ntc_memq+0x54>
  bc:	e5913000 	ldr	r3, [r1]
  c0:	e1530000 	cmp	r3, r0
  c4:	01a00001 	moveq	r0, r1
  c8:	012fff1e 	bxeq	lr
  cc:	e5911004 	ldr	r1, [r1, #4]
  d0:	e3110006 	tst	r1, #6	; 0x6
  d4:	13a03000 	movne	r3, #0	; 0x0
  d8:	03a03001 	moveq	r3, #1	; 0x1
  dc:	e3510000 	cmp	r1, #0	; 0x0
  e0:	03a03000 	moveq	r3, #0	; 0x0
  e4:	12033001 	andne	r3, r3, #1	; 0x1
  e8:	e3530000 	cmp	r3, #0	; 0x0
  ec:	1a00002d 	bne	bc <ntc_memq+0x20>
  f0:	e3a00000 	mov	r0, #0	; 0x0
  f4:	e12fff1e 	bx	lr

000000f8 <and>:
  f8:	e3100006 	tst	r0, #6	; 0x6
  fc:	1a000043 	bne	114 <and+0x1c>
 100:	e3500006 	cmp	r0, #6	; 0x6
 104:	012fff1e 	bxeq	lr
 108:	e5900004 	ldr	r0, [r0, #4]
 10c:	e3100006 	tst	r0, #6	; 0x6
 110:	0a00003e 	beq	100 <and+0x8>
 114:	e3a000a6 	mov	r0, #166	; 0xa6
 118:	e12fff1e 	bx	lr

0000011c <ntc_and>:
 11c:	e3100006 	tst	r0, #6	; 0x6
 120:	13a03000 	movne	r3, #0	; 0x0
 124:	03a03001 	moveq	r3, #1	; 0x1
 128:	e3500000 	cmp	r0, #0	; 0x0
 12c:	03a03000 	moveq	r3, #0	; 0x0
 130:	12033001 	andne	r3, r3, #1	; 0x1
 134:	e3530000 	cmp	r3, #0	; 0x0
 138:	0a000058 	beq	168 <ntc_and+0x4c>
 13c:	e3500000 	cmp	r0, #0	; 0x0
 140:	012fff1e 	bxeq	lr
 144:	e5900004 	ldr	r0, [r0, #4]
 148:	e3100006 	tst	r0, #6	; 0x6
 14c:	13a03000 	movne	r3, #0	; 0x0
 150:	03a03001 	moveq	r3, #1	; 0x1
 154:	e3500000 	cmp	r0, #0	; 0x0
 158:	03a03000 	moveq	r3, #0	; 0x0
 15c:	12033001 	andne	r3, r3, #1	; 0x1
 160:	e3530000 	cmp	r3, #0	; 0x0
 164:	1a00004d 	bne	13c <ntc_and+0x20>
 168:	e59f3004 	ldr	r3, [pc, #4]	; 174 <ntc_and+0x58>
 16c:	e5930000 	ldr	r0, [r3]
 170:	e12fff1e 	bx	lr
 174:	00000000 	andeq	r0, r0, r0
