
imm-test.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 imm-test.c
00000000 l    d  .text	00000000 
00000000 l    d  .data	00000000 
00000000 l    d  .bss	00000000 
00000000 l    d  .comment	00000000 
00000000 g       .text	00000010 falsep
00000010 g       .text	00000010 ntc_falsep
00000020 g       .text	00000010 nullp
00000030 g       .text	00000010 ntc_nullp
00000040 g       .text	00000012 consp
00000054 g       .text	00000016 ntc_consp
0000006c g       .text	00000022 memq
00000090 g       .text	0000002a ntc_memq
000000bc g       .text	00000020 and
000000dc g       .text	00000028 ntc_and
00000004       O *COM*	00000020 scm_ntc_true


Disassembly of section .text:

00000000 <falsep>:
   0:	b500      	push	{lr}
   2:	2300      	mov	r3, #0
   4:	2806      	cmp	r0, #6
   6:	d001      	beq	c <falsep+0xc>
   8:	1c18      	mov	r0, r3		(add r0, r3, #0)
   a:	bd00      	pop	{pc}
   c:	2301      	mov	r3, #1
   e:	e7fb      	b	8 <falsep+0x8>

00000010 <ntc_falsep>:
  10:	b500      	push	{lr}
  12:	2300      	mov	r3, #0
  14:	2800      	cmp	r0, #0
  16:	d001      	beq	1c <ntc_falsep+0xc>
  18:	1c18      	mov	r0, r3		(add r0, r3, #0)
  1a:	bd00      	pop	{pc}
  1c:	2301      	mov	r3, #1
  1e:	e7fb      	b	18 <ntc_falsep+0x8>

00000020 <nullp>:
  20:	b500      	push	{lr}
  22:	2300      	mov	r3, #0
  24:	2826      	cmp	r0, #38
  26:	d001      	beq	2c <nullp+0xc>
  28:	1c18      	mov	r0, r3		(add r0, r3, #0)
  2a:	bd00      	pop	{pc}
  2c:	2301      	mov	r3, #1
  2e:	e7fb      	b	28 <nullp+0x8>

00000030 <ntc_nullp>:
  30:	b500      	push	{lr}
  32:	2300      	mov	r3, #0
  34:	2802      	cmp	r0, #2
  36:	d001      	beq	3c <ntc_nullp+0xc>
  38:	1c18      	mov	r0, r3		(add r0, r3, #0)
  3a:	bd00      	pop	{pc}
  3c:	2301      	mov	r3, #1
  3e:	e7fb      	b	38 <ntc_nullp+0x8>

00000040 <consp>:
  40:	b500      	push	{lr}
  42:	2306      	mov	r3, #6
  44:	4018      	and	r0, r3
  46:	2200      	mov	r2, #0
  48:	2800      	cmp	r0, #0
  4a:	d100      	bne	4e <consp+0xe>
  4c:	2201      	mov	r2, #1
  4e:	1c10      	mov	r0, r2		(add r0, r2, #0)
  50:	bd00      	pop	{pc}
	...

00000054 <ntc_consp>:
  54:	b500      	push	{lr}
  56:	2306      	mov	r3, #6
  58:	4003      	and	r3, r0
  5a:	2200      	mov	r2, #0
  5c:	2b00      	cmp	r3, #0
  5e:	d102      	bne	66 <ntc_consp+0x12>
  60:	2800      	cmp	r0, #0
  62:	d000      	beq	66 <ntc_consp+0x12>
  64:	2201      	mov	r2, #1
  66:	1c10      	mov	r0, r2		(add r0, r2, #0)
  68:	bd00      	pop	{pc}
	...

0000006c <memq>:
  6c:	b500      	push	{lr}
  6e:	2306      	mov	r3, #6
  70:	400b      	and	r3, r1
  72:	1c02      	mov	r2, r0		(add r2, r0, #0)
  74:	1c08      	mov	r0, r1		(add r0, r1, #0)
  76:	2b00      	cmp	r3, #0
  78:	d107      	bne	8a <memq+0x1e>
  7a:	6803      	ldr	r3, [r0, #0]
  7c:	4293      	cmp	r3, r2
  7e:	d005      	beq	8c <memq+0x20>
  80:	6840      	ldr	r0, [r0, #4]
  82:	2306      	mov	r3, #6
  84:	4003      	and	r3, r0
  86:	2b00      	cmp	r3, #0
  88:	d0f7      	beq	7a <memq+0xe>
  8a:	2006      	mov	r0, #6
  8c:	bd00      	pop	{pc}
	...

00000090 <ntc_memq>:
  90:	b500      	push	{lr}
  92:	2306      	mov	r3, #6
  94:	400b      	and	r3, r1
  96:	1c02      	mov	r2, r0		(add r2, r0, #0)
  98:	1c08      	mov	r0, r1		(add r0, r1, #0)
  9a:	2b00      	cmp	r3, #0
  9c:	d10b      	bne	b6 <ntc_memq+0x26>
  9e:	2900      	cmp	r1, #0
  a0:	d009      	beq	b6 <ntc_memq+0x26>
  a2:	6803      	ldr	r3, [r0, #0]
  a4:	4293      	cmp	r3, r2
  a6:	d007      	beq	b8 <ntc_memq+0x28>
  a8:	6840      	ldr	r0, [r0, #4]
  aa:	2306      	mov	r3, #6
  ac:	4003      	and	r3, r0
  ae:	2b00      	cmp	r3, #0
  b0:	d101      	bne	b6 <ntc_memq+0x26>
  b2:	2800      	cmp	r0, #0
  b4:	d1f5      	bne	a2 <ntc_memq+0x12>
  b6:	2000      	mov	r0, #0
  b8:	bd00      	pop	{pc}
	...

000000bc <and>:
  bc:	b500      	push	{lr}
  be:	2306      	mov	r3, #6
  c0:	4003      	and	r3, r0
  c2:	2b00      	cmp	r3, #0
  c4:	d106      	bne	d4 <and+0x18>
  c6:	2806      	cmp	r0, #6
  c8:	d006      	beq	d8 <and+0x1c>
  ca:	6840      	ldr	r0, [r0, #4]
  cc:	2306      	mov	r3, #6
  ce:	4003      	and	r3, r0
  d0:	2b00      	cmp	r3, #0
  d2:	d0f8      	beq	c6 <and+0xa>
  d4:	20a6      	mov	r0, #166
  d6:	bd00      	pop	{pc}
  d8:	2006      	mov	r0, #6
  da:	e7fc      	b	d6 <and+0x1a>

000000dc <ntc_and>:
  dc:	b500      	push	{lr}
  de:	2306      	mov	r3, #6
  e0:	4003      	and	r3, r0
  e2:	2b00      	cmp	r3, #0
  e4:	d108      	bne	f8 <ntc_and+0x1c>
  e6:	2800      	cmp	r0, #0
  e8:	d006      	beq	f8 <ntc_and+0x1c>
  ea:	6840      	ldr	r0, [r0, #4]
  ec:	2306      	mov	r3, #6
  ee:	4003      	and	r3, r0
  f0:	2b00      	cmp	r3, #0
  f2:	d101      	bne	f8 <ntc_and+0x1c>
  f4:	2800      	cmp	r0, #0
  f6:	d1f8      	bne	ea <ntc_and+0xe>
  f8:	4b01      	ldr	r3, [pc, #4]	(100 <ntc_and+0x24>)
  fa:	6818      	ldr	r0, [r3, #0]
  fc:	bd00      	pop	{pc}
  fe:	0000      	lsl	r0, r0, #0
 100:	0000      	lsl	r0, r0, #0
	...
