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From: "A.Goto" <r98036ag@iizuka.isc.kyutech.ac.jp>
To: FreeBSD-users-jp@jp.freebsd.org
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Subject: [FreeBSD-users-jp 46239] I would like to get the data of WAP-EP.
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	r98036ag@iizuka.isc.kyutech.ac.jp
	$B8eF#$"$-$i(J

$B!J0J2<$N%3!<%I$r#g#c#c$G%3%s%Q%$%k$7$F2<$5$$!K(J

#include    <stdio.h>
#include    <sys/types.h>
#include    <sys/mman.h>
#include    <unistd.h>
#include    <fcntl.h>
#include    <machine/cpufunc.h>
#include    "regs.h"

#define     MAPPING_LENGTH    (64 * 1024)
#define     MMIO_START        0x3800000
 // #define     CORE_DUMP

/* prototypes */
void    dump_data(unsigned char *buffer_ptr);
void    operation_mmio(unsigned char *mapped_mmio_area);
void    enable(unsigned char *mapped_mmio_area);
void    _enable(unsigned char *mapped_mmio_area);
void    _disable(unsigned char *mapped_mmio_area);
void    memfill(unsigned char *mapped_framebuffer);

void    main(void)
{
  int              fd;
  int              id;
  unsigned char    *mp;    /* for mmio */
  unsigned char    *fp;    /* for frame buffer */
  unsigned char    buffer[MAPPING_LENGTH];
  unsigned int     i;

  //--- mapping MMIO control area. ----
  fd = open("/dev/mem", O_RDWR);
  if(fd < 0)
    {
      printf("cannot open /dev/mem! \n");
    }
  mp = mmap((caddr_t)0, MAPPING_LENGTH, (PROT_READ | PROT_WRITE), \
		MAP_PRIVATE, fd, MMIO_START);
  if(mp == NULL)
    {
      printf("cannot mapping! \n");
      exit(0);
    }
  fp = (unsigned char *)((unsigned int)mp + 0x400000);

  //--- enable I/O port access for disabling GDC. ---
  id = open("/dev/io", O_RDWR);
  if(id < 0)
    {
      printf("cannot open /dev/io! \n");
      exit(0);
    }

  //--- let us go to the astoral! ---
  _enable(mp);
  enable(mp);

  // operate test data. 
   // operation_mmio(mp);

  //--- fill frame buffer. ---
   // memfill(fp);

  //--- return normal PC98. ---
  _disable(mp);

#ifdef CORE_DUMP
  // dump control memory area.
  for(i = 0; i < MAPPING_LENGTH; i++)
    {
      buffer[i] = mp[i];
    }
  dump_data(&buffer[0]);
#endif /* CORE_DUMP */
}


void    dump_data(unsigned char *buffer_ptr)
{
  unsigned int    i;
  unsigned int    j;

  for(i = 0; i < (MAPPING_LENGTH / 16); i++)
    {
      printf(" %08x ", (16 * i)); 
      for(j = 0; j < 16; j++)
	{
	  printf(" %02x", *buffer_ptr);
	  buffer_ptr++;
	}
      printf(" \n");
    }
}


void    operation_mmio(unsigned char *mapped_mmio_area)
{
  // write code for operating MMIO.

  volatile struct x86_registers    regs;
  volatile unsigned char    save_VCLK_numerator[4];
  volatile unsigned char    save_VCLK_denominator[4];
  volatile unsigned short   data_0550;
  volatile unsigned short   data_0551;
  volatile unsigned int     i;
  unsigned short    swap;
  unsigned long     push_0;

 sub_0009:
  mapped_mmio_area[0x46e8] = 0x18;
  mapped_mmio_area[0x03c2] = 0x01;
  mapped_mmio_area[0x46e8] = 0x08;
  mapped_mmio_area[0x03c2] = 0xe3;
  mapped_mmio_area[0x03da] = 0x00;
  // end of sub_0009

 sub_0010:
  for(i = 0; i < 4; i++)
    {
      regs.eax.byte_eax.al = mapped_mmio_area[0x03c6];
    }
  mapped_mmio_area[0x03c6] = 0x20;
  // end of sub_0010

 sub_0005:
  regs.eax.byte_eax.al = 0x0b;
  for(i = 0; i < 4; i++)
    {
      mapped_mmio_area[0x03c4] = regs.eax.byte_eax.al;
      regs.eax.word_eax.ax = mapped_mmio_area[0x03c4];
      regs.ebx.byte_ebx.bl = regs.eax.byte_eax.ah;
      save_VCLK_numerator[i] = regs.ebx.byte_ebx.bl;
      (regs.eax.byte_eax.al)++;
    }
  regs.eax.byte_eax.al = 0x1b;
  for(i = 0; i < 4; i++)
    {
      mapped_mmio_area[0x03c4] = regs.eax.byte_eax.al;
      regs.eax.word_eax.ax = mapped_mmio_area[0x03c4];
      regs.ebx.byte_ebx.bl = regs.eax.byte_eax.ah;
      save_VCLK_denominator[i] = regs.ebx.byte_ebx.bl;
      (regs.eax.byte_eax.al)++;
    }
  // end of sub_0005

 sub_0004:
  mapped_mmio_area[0x03c4] = 0x16;
  regs.eax.word_eax.ax = mapped_mmio_area[0x03c4];
  mapped_mmio_area[0x03c4] = 0x1f;
  data_0551 = mapped_mmio_area[0x03c4];
  regs.eax.word_eax.ax = mapped_mmio_area[0x03c4];
  (unsigned char)data_0551 = regs.eax.byte_eax.ah;
  // data_0550 = "parameter 1 of sub_0002";
  // end of sub_0004

 sub_0011:
  /*
  //--- lock Cirrus extended registers. ---
  mapped_mmio_area[0x03c4] = 0x06;
  mapped_mmio_area[0x03c5] = 0x0f;
  */

  //--- unlock Cirrus extended registers. ---
  mapped_mmio_area[0x03c4] = 0x06;    /* SR6 */
  mapped_mmio_area[0x03c5] = 0x12;

  mapped_mmio_area[0x03c4] = 0x00;    /* SR0 */
  mapped_mmio_area[0x03c5] = 0x02;
  mapped_mmio_area[0x03c4] = 0x00;
  mapped_mmio_area[0x03c5] = 0x03;

  //--- guesswork! (default on windows driver) ---
  mapped_mmio_area[0x03c4] = 0x07;    /* SR7 */
  mapped_mmio_area[0x03c5] = 0x11;

   // mapped_mmio_area[0x03c4] = 0x08;    /* SR8 */
   // mapped_mmio_area[0x03c5] = 0x00;

  mapped_mmio_area[0x03c4] = 0x09;    /* SR9 */
  mapped_mmio_area[0x03c5] = 0x00;

  mapped_mmio_area[0x03c4] = 0x0a;    /* SRA */
  mapped_mmio_area[0x03c5] = 0x00;

  mapped_mmio_area[0x03c4] = 0x0b;    /* SRB */
  mapped_mmio_area[0x03c5] = 0x66;

  mapped_mmio_area[0x03c4] = 0x0c;    /* SRC */
  mapped_mmio_area[0x03c5] = 0x51;

  mapped_mmio_area[0x03c4] = 0x0d;    /* SRD */
  mapped_mmio_area[0x03c5] = 0x76;

  mapped_mmio_area[0x03c4] = 0x0e;    /* SRE */
  mapped_mmio_area[0x03c5] = 0x55;

  mapped_mmio_area[0x03c4] = 0x0f;    /* SRF */
  mapped_mmio_area[0x03c5] = 0xb4;

  mapped_mmio_area[0x03c4] = 0x16;    /* SR16 */
  mapped_mmio_area[0x03c5] = 0xf0;

  mapped_mmio_area[0x03c4] = 0x18;    /* SR18 */
  mapped_mmio_area[0x03c5] = 0x02;

  mapped_mmio_area[0x03c4] = 0x19;    /* SR19 */
  mapped_mmio_area[0x03c5] = 0x01;

  mapped_mmio_area[0x03c4] = 0x1b;    /* SR1B */
  mapped_mmio_area[0x03c5] = 0x3b;

  mapped_mmio_area[0x03c4] = 0x1c;    /* SR1C */
  mapped_mmio_area[0x03c5] = 0x3a;

  mapped_mmio_area[0x03c4] = 0x1d;    /* SR1D */
  mapped_mmio_area[0x03c5] = 0x34;

  mapped_mmio_area[0x03c4] = 0x1e;    /* SR1E */
  mapped_mmio_area[0x03c5] = 0x36;

  mapped_mmio_area[0x03c4] = 0x1f;    /* SR1F */
  mapped_mmio_area[0x03c5] = 0x1c;

  /* set Cirrus CRTC registers. */
  mapped_mmio_area[0x03d4] = 0x11;    /* CR11 */
  regs.eax.byte_eax.ah = mapped_mmio_area[0x03d5];
  regs.eax.byte_eax.ah &= 0x7f;
  mapped_mmio_area[0x03d5] = regs.eax.byte_eax.ah;

  /* set Cirrus Miscellaneous register. */
  //--- guesswork! (enable on Chicago)---
  mapped_mmio_area[0x03c2] = 0xe3;    /* MISC */

  /* set Cirrus VGA attribute registers? */
  for(i = 0; i < 0x0a; i++)
    {
      mapped_mmio_area[0x03c0] = 0x06;
      mapped_mmio_area[0x03c0] = 0x06;
    }
  mapped_mmio_area[0x03c0] = 0x10;
  mapped_mmio_area[0x03c0] = 0x07;

  /* set Cirrus Extended registers. */
  mapped_mmio_area[0x03ce] = 0x31;    /* GR31 */
  mapped_mmio_area[0x03cf] = 0x04;
  regs.eax.word_eax.ax = 0x0431;
  for(i = 0; i < 0xffff; i++)
    {
      mapped_mmio_area[0x03ce] = regs.eax.byte_eax.al;
      regs.eax.byte_eax.ah = mapped_mmio_area[0x03cf];
      if((regs.eax.byte_eax.ah & 0x01) == 0x00)
	{
	break;
      }
    }

  for(i = 0; i < 4; i++)
    {
      mapped_mmio_area[0x03c4] = (0x10 + i);    /* SR(10-13) */
      mapped_mmio_area[0x03c5] = 0x00;
    }

  for(i = 0; i < 0x0a; i++)
    {
      mapped_mmio_area[0x03ce] = (0x20 + i);    /* GR(20-30) */
      mapped_mmio_area[0x03cf] = 0x00;
    }

  regs.eax.byte_eax.al = mapped_mmio_area[0x03cc];    /* MISC */
  regs.eax.byte_eax.al = mapped_mmio_area[0x03da];
  regs.eax.byte_eax.al = 0x00;
  mapped_mmio_area[0x03c0] = regs.eax.byte_eax.al;

  regs.eax.byte_eax.al = mapped_mmio_area[0x03c4];
  // push ax
  (unsigned short)push_0 = regs.eax.word_eax.ax;
  regs.eax.byte_eax.al = 0x01;
  mapped_mmio_area[0x03c4] = regs.eax.byte_eax.al;
  regs.eax.byte_eax.ah = regs.eax.byte_eax.al;
  regs.eax.byte_eax.al = mapped_mmio_area[0x03c5];
  (unsigned char)swap = regs.eax.byte_eax.ah;
  regs.eax.byte_eax.ah = regs.eax.byte_eax.al;
  regs.eax.byte_eax.al = (unsigned char)swap;
  regs.eax.byte_eax.ah &= 0xdf;
  // xchg al,ah
  mapped_mmio_area[0x03c4] = regs.eax.byte_eax.al;
  mapped_mmio_area[0x03c5] = regs.eax.byte_eax.ah;
  // pop ax
  regs.eax.word_eax.ax = (unsigned short)push_0;
  mapped_mmio_area[0x03c4] = regs.eax.byte_eax.al;

  mapped_mmio_area[0x03c4] = 0x08;
  mapped_mmio_area[0x03c5] = 0x02;
  regs.eax.byte_eax.al = mapped_mmio_area[0x03c5];
  if((regs.eax.byte_eax.al &= 0x80) == 0x00)
    {
      regs.eax.word_eax.ax = 0x7d0f;
    }
  else
    {
      regs.eax.word_eax.ax = 0xfd0f;
    }

  printf(" al is %x \n", regs.eax.byte_eax.al);

  mapped_mmio_area[0x03c4] = regs.eax.byte_eax.al;
  mapped_mmio_area[0x03c5] = regs.eax.byte_eax.ah;
  regs.eax.byte_eax.al = mapped_mmio_area[0x03c5];
  regs.eax.byte_eax.al &= 0xfd;
  mapped_mmio_area[0x03c5] = regs.eax.byte_eax.al;
}


void    enable(unsigned char *mapped_mmio_area)
{
  volatile unsigned int     i;
  unsigned char             al;
  unsigned char             temp;

  /*
  temp = inb(0x43b);
  outb(0x43b, temp & 0xfd);
  */

  // outb(0x6A,0x00); /* Do 8 colors mode */
  // outb(0x7C,0x00); /* GRCG OFF */
  // outb(0x3C4,0x06);
  // outb(0x3C5,0x12); /* unlock cirrus special */
  // outb(0xf5c,0xFB); /* switch display. normal --> WAB */
  // outb(0xf5d,0xFA); /* WAB -> normal */
  // outb(0xf5c,0xFB); /* switch display. normal --> WAB */

  /*
  outb(0x043f, 0x42);
  for(;;)
    {
      temp = inb(0x0c09);
      if((temp & 0x01) == 0x00)
	{
	  break;
	}
    }
  outb(0x0c09, 0xa9);
  for(;;)
    {
      temp = inb(0x0c09);
      if((temp & 0x01) == 0x00)
	{
	  break;
	}
    }
  temp = inb(0x0c0b);
  if((temp & 0x80) == 0x00)
    {
      printf("0x380 \n");
    }
  else
    {
      printf("0x83c0 \n");
    }
  outb(0x43f, 0x40);
  */
  /*
  mapped_mmio_area[0x46e8] = 0x18;
  mapped_mmio_area[0x03c2] = 0x01;
  mapped_mmio_area[0x46e8] = 0x08;
  mapped_mmio_area[0x03c2] = 0xe3;
  mapped_mmio_area[0x03da] = 0x00;
  */
  /*
  //--- lock Cirrus all extension! ---
  mapped_mmio_area[0x03c4] = 0x06;
  mapped_mmio_area[0x03c5] = 0x0f;
  */
  //--- unlock Cirrus all extensions! ---
  mapped_mmio_area[0x03c4] = 0x06;
  mapped_mmio_area[0x03c5] = 0x12;

  //--- second deadline start! ---
   // al = mapped_mmio_area[0x03cc];
   // al |= 0x02;
   // mapped_mmio_area[0x03c2] = al;
   // al = 0x24;
   // mapped_mmio_area[0x03d4] = al;
  /*
  al = mapped_mmio_area[0x03d5];
  if(al == 0x80)
    {
      al = mapped_mmio_area[0x03c1];
      mapped_mmio_area[0x03c0] = al;
    }
  */

  //--- kaname! (1st step) ---
  mapped_mmio_area[0x03c4] = 0x08;
  // mapped_mmio_area[0x03c5] = 0x00;
  mapped_mmio_area[0x03c5] = 0x01;

  //--- kaname? (2nd step) ---
  // mapped_mmio_area[0x03d4] = 0x24;
  //--- recovery time? ---
  for(i = 0; i < 0xffff; i++)
    {
      // nop
    }
  //--- second deadline end! ---

  /*
  al = mapped_mmio_area[0x03d5];
  if(al == 0x80)
    {
      al = mapped_mmio_area[0x03c1];
      mapped_mmio_area[0x03c0] = al;
    }
  //--- first deadline! ---
  if(al == 0x00)
    {
      printf("al = 0x00 \n");
    }
  else
    {
      al = 0x80;
      printf("al = 0x80 \n");
    }
  mapped_mmio_area[0x03c0] = al;
  */
}


void    _enable(unsigned char *mapped_mmio_area)
{
  volatile unsigned int    i;
  unsigned char    IdentVal;
  unsigned char    id = 0x00;
  unsigned char    rev = 0x00;
  unsigned char    partstatus = 0x00;

  //--- Do 8 colors mode! ---
  outb(0x6a, 0x00);
  //--- NEC PC-98's GRCG off! ---
  outb(0x7c, 0x00);

  mapped_mmio_area[0x03c3] = 0x01;

 sub_0138:
  mapped_mmio_area[0x46e8] = 0x18;    /* setup, video subsystem! */
  mapped_mmio_area[0x03c2] = 0x01;    /* CRTC is 0x03d4, color mode. */
  mapped_mmio_area[0x46e8] = 0x08;    /* exit setup. */
  mapped_mmio_area[0x03c2] = 0xe3;
  mapped_mmio_area[0x03da] = 0x00;

 sub_0109:
  //--- unlock Cirrus all extensions! ---
  mapped_mmio_area[0x03c4] = 0x06;
  mapped_mmio_area[0x03c5] = 0x12;

  //--- information of Cirrus CLGD5434 ID, revision and partstatus. ---
    // chip type and revision
  mapped_mmio_area[0x03d4] = 0x27;
  IdentVal = mapped_mmio_area[0x03d5];
  id = (IdentVal & 0xfc) >> 2;
  rev = (IdentVal & 0x03);
  mapped_mmio_area[0x03d4] = 0x25;
  partstatus = mapped_mmio_area[0x03d5];
  printf("--- Melco WAP-EP graphic accelerator infomation. --- \n");
  if(id == 0x2a)
    {
      // 0x2a is CLGD5434_ID.
      printf("chip is Cirrus Logic CLGD5434 (Alpine family). \n");
    }
  else
    {
      printf("chip is unknown... (unknown code)\n");
    }
  if((partstatus & 0xc0) == 0xc0)
    {
      printf("better than Revision D/E/F, MCLK-60MHz and VCLK-135MHz. \n");
    }
  else if(partstatus == 0x8e)
    {
      printf("intermediate revision, supports 135MHz VCLK. \n");
    }
  else
    {
      printf("normal revision, supports, MCLK-60MHZ and VCLK-110MHz. \n");
    }
    // bus check
  mapped_mmio_area[0x03c4] = 0x17;
  switch((mapped_mmio_area[0x03c5] >> 3) & 0x07)
    {
    case 0x02:
      printf("installed on VL-bus over 33MHz. \n");
      break;
    case 0x06:
      printf("installed on VL-bus at 33MHZ. \n");
      break;
    case 0x04:
      printf("installed on PCI-bus. \n");
      break;
    case 0x07:
      printf("installed on ISA-bus. \n");
      break;
    default:
      printf("installed on unknown bus? \n");
      break;
    }

    // video memory check
  mapped_mmio_area[0x03c4] = 0x08;
  mapped_mmio_area[0x03c5] &= 0x02;
  if((mapped_mmio_area[0x03c5] & 0x80) != 0x00)
    {
      printf("video RAM is 4096 Kbytes installed. \n");
    }
  else
    {
      printf("video RAM is 2048 Kbytes installed. \n");
    }
  mapped_mmio_area[0x03c5] &= 0xfd;

  //--- EEPROM control. ---
  mapped_mmio_area[0x03c4] = 0x08;
  mapped_mmio_area[0x03c5] = 0x02;
  if((mapped_mmio_area[0x03c5] & 0x80) != 0x00)
    {
      mapped_mmio_area[0x03c5] &= 0xfd;
    }
  else
    {
      // mov dx,0x20;
    }

  //--- recovery time? ---
  for(i = 0x0000; i < 0xffff; i++)
    {
      // nop
    }
}


void    _disable(unsigned char *mapped_mmio_area)
{
  volatile unsigned int    i;

  //--- EEPROM control. ---
  mapped_mmio_area[0x03c4] = 0x08;
  mapped_mmio_area[0x03c5] = 0x02;

  //--- recorvery time? ---
  for(i = 0x0000; i < 0xffff; i++)
    {
      // nop
    }
}


void    memfill(unsigned char *mapped_framebuffer)
{
  unsigned int    i;

  for(i = 0; i < 0xffff; i++)
    {
      mapped_framebuffer[i] = 0xff;
    }
}
