From owner-FreeBSD-users-jp@jp.freebsd.org  Fri Jul  5 05:00:57 1996
Received: by mail.jp.freebsd.org (8.7.3+2.6Wbeta5/8.7.3) id FAA14448
	Fri, 5 Jul 1996 05:00:57 +0900 (JST)
Received: by mail.jp.freebsd.org (8.7.3+2.6Wbeta5/8.7.3) with SMTP id FAA14443
	for <freebsd-users-jp@jp.freebsd.org>; Fri, 5 Jul 1996 05:00:49 +0900 (JST)
Received: from klein2.eis.or.jp by po.eis.or.jp (8.6.12+2.4W/eis1.0:Mon Apr 17 19:45:40 JST 1995)
	id FAA25144; Fri, 5 Jul 1996 05:00:21 +0900
Received: from localhost (localhost [127.0.0.1]) by klein2.eis.or.jp (8.7.5/3.3W9-96062823) with ESMTP id AAA00692 for freebsd-users-jp@jp.freebsd.org; Fri, 5 Jul 1996 00:26:02 +0900 (JST)
Message-Id: <199607041526.AAA00692@klein2.eis.or.jp>
To: FreeBSD-users-jp@jp.freebsd.org
In-Reply-To: Your message of "Thu, 04 Jul 1996 13:33:06 +0900"
References: <9607040433.AA01180@ichigisv.ed1.com1.fc.nec.co.jp>
X-Mailer: Mew version 1.06 on Emacs 19.28.1, Mule 2.3
Mime-Version: 1.0
Content-Type: Multipart/Mixed;
	boundary="--Next_Part(Fri_Jul__5_00:20:47_1996)--"
Date: Fri, 05 Jul 1996 00:26:01 +0900
From: Takeshi Imai <take@po.eis.or.jp>
Reply-To: FreeBSD-users-jp@jp.freebsd.org
X-Distribute: distribute [version 2.1 (Alpha) patchlevel=19]
X-Sequence: FreeBSD-users-jp 2825
Subject: [FreeBSD-users-jp 2825] Re: PC-9821Xa10
	=?ISO-2022-JP?B?GyRCJE4lNyVqJSIlayVdITwlSCRLJEQkJCRGGyhC?=
Errors-To: owner-FreeBSD-users-jp@jp.freebsd.org
Sender: owner-FreeBSD-users-jp@jp.freebsd.org

----Next_Part(Fri_Jul__5_00:20:47_1996)--
Content-Type: Text/Plain; charset=iso-2022-jp

$B:#0f$G$9!#(B

Xa$B$N%7%j%"%k%]!<%H$N%Q%C%A$G$9!#(B

2'nd port$B$r;H$&>l9g$O(Bconfig$B%U%!%$%k$K(B

device		sio1	at nec? port 0x238  tty irq 5 vector siointr

$B$rDI2C$7$F$/$@$5$$!#(B


----Next_Part(Fri_Jul__5_00:20:47_1996)--
Content-Type: Text/Plain; charset=us-ascii

*** sio.c.orig	Thu Jul  4 23:48:25 1996
--- sio.c	Fri Jul  5 00:10:27 1996
***************
*** 524,529 ****
--- 524,534 ----
  	15600,	15600,
  	31200,	31200,
  	62400,	62400,
+ 	14400,  0x8c,
+ 	28800,  0x84,
+ 	38400,  0x83,
+ 	57600,  0x82,
+ 	115200, 0x81,
  	-1,	-1
  };
  #ifdef COM_IF_PIO9032B
***************
*** 975,981 ****
  	com->iobase = iobase;
  #if defined(PC98)
  	if(pc98_set_ioport(com, iobase) == -1)
! 		if((iobase & 0x0f0) == 0xd0) {
  			com->pc98_if_type = MC16550;
  			com->data_port = iobase + com_data;
  			com->int_id_port = iobase + com_iir;
--- 980,987 ----
  	com->iobase = iobase;
  #if defined(PC98)
  	if(pc98_set_ioport(com, iobase) == -1)
! /*		if((iobase & 0x0f0) == 0xd0) {*/
!                 if((iobase & 0xfff) == 0x238) {
  			com->pc98_if_type = MC16550;
  			com->data_port = iobase + com_data;
  			com->int_id_port = iobase + com_iir;
***************
*** 3558,3563 ****
--- 3564,3571 ----
  	    case COM_IF_INTERNAL:
  		/* for *1CLK asynchronous! mode		, TEFUTEFU */
  		effect_sp = ttspeedtab( speed, pc98speedtab );
+ 		if ( (effect_sp>0x80) && (effect_sp<0x8f) )
+ 			return effect_sp;
  		if ( effect_sp < 0 )
  			effect_sp = ttspeedtab( (speed-1), pc98speedtab );
  		if ( effect_sp <= 0 )
***************
*** 3617,3629 ****
  			return;
  		} else if ( count == 0 )
  			return;
! 		/* set i8253 */
! 		s = splclock();
! 		outb( 0x77, 0xb6 );
! 		outb( 0x5f, 0);
! 		outb( 0x75, count & 0xff );
! 		outb( 0x5f, 0);
! 		outb( 0x75, (count >> 8) & 0xff );
  		splx(s);
  		break;
  #if 0
--- 3625,3643 ----
  			return;
  		} else if ( count == 0 )
  			return;
! 		if ( (count>0x80) && (count<0x8f) ) {
! 		  outb(0x13a, count & 0xff); 
! 		}
! 		else {
! 		  /* set i8253 */
! 		  s = splclock();
! 		  outb( 0x13a, 0);
! 		  outb( 0x77, 0xb6 );
! 		  outb( 0x5f, 0);
! 		  outb( 0x75, count & 0xff );
! 		  outb( 0x5f, 0);
! 		  outb( 0x75, (count >> 8) & 0xff );
! 		}
  		splx(s);
  		break;
  #if 0
***************
*** 3695,3701 ****
  			break;
  #endif
  	    default:
! 			if((iobase & 0x0f0) == 0xd0){
  				iod->if_type = MC16550;
  				return 0;
  			}
--- 3709,3716 ----
  			break;
  #endif
  	    default:
! /*			if((iobase & 0x0f0) == 0xd0){*/
! 			if((iobase & 0xfff) == 0x238){
  				iod->if_type = MC16550;
  				return 0;
  			}
*** sioreg.h.orig	Thu Jul  4 23:48:36 1996
--- sioreg.h	Fri Jul  5 00:10:27 1996
***************
*** 37,43 ****
  
  /* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
  #if defined(PC98)
! #define	COMBRD(x)	(7372800 / (16*(x)))
  #else
  #define	COMBRD(x)	(1843200 / (16*(x)))
  #endif
--- 37,43 ----
  
  /* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
  #if defined(PC98)
! #define	COMBRD(x)	(7372800 / (64*(x)))
  #else
  #define	COMBRD(x)	(1843200 / (16*(x)))
  #endif
*** ic/ns16550.h.orig	Fri Jul  5 00:11:04 1996
--- ic/ns16550.h	Fri Jul  5 00:11:25 1996
***************
*** 41,54 ****
   * modified for MC16550II
   */
  
! #define	com_data	0x000	/* data register (R/W) */
! #define	com_dlbl	0x000	/* divisor latch low (W) */
! #define	com_dlbh	0x100	/* divisor latch high (W) */
! #define	com_ier		0x100	/* interrupt enable (W) */
! #define	com_iir		0x200	/* interrupt identification (R) */
! #define	com_fifo	0x200	/* FIFO control (W) */
! #define	com_lctl	0x300	/* line control register (R/W) */
! #define	com_cfcr	0x300	/* line control register (R/W) */
! #define	com_mcr		0x400	/* modem control register (R/W) */
! #define	com_lsr		0x500	/* line status register (R/W) */
! #define	com_msr		0x600	/* modem status register (R/W) */
--- 41,54 ----
   * modified for MC16550II
   */
  
! #define	com_data	0x0	/* data register (R/W) */
! #define	com_dlbl	0x0	/* divisor latch low (W) */
! #define	com_dlbh	0x1	/* divisor latch high (W) */
! #define	com_ier		0x1	/* interrupt enable (W) */
! #define	com_iir		0x2	/* interrupt identification (R) */
! #define	com_fifo	0x2	/* FIFO control (W) */
! #define	com_lctl	0x3	/* line control register (R/W) */
! #define	com_cfcr	0x3	/* line control register (R/W) */
! #define	com_mcr		0x4	/* modem control register (R/W) */
! #define	com_lsr		0x5	/* line status register (R/W) */
! #define	com_msr		0x6	/* modem status register (R/W) */

----Next_Part(Fri_Jul__5_00:20:47_1996)----
